Difference between revisions of "V810"

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The RISC CPU used in the [[Main_Page#PC-FX | PC-FX]] clocked at 21.477MHz.
 
The RISC CPU used in the [[Main_Page#PC-FX | PC-FX]] clocked at 21.477MHz.
  
Line 5: Line 20:
 
== CPU Memory Map ==
 
== CPU Memory Map ==
  
{|
+
{| class="styled_table"
 
|-
 
|-
| Memory range
+
! Memory range !! R/W !! Description
| R/W
+
| Description
+
 
|-
 
|-
| $00000000-$001FFFFF
+
| $00000000 - $001FFFFF
 
| R/W
 
| R/W
 
| 1MB Internal RAM
 
| 1MB Internal RAM
 
|-
 
|-
| $80000000-$80000FFF?
+
| $80000000 - $80000FFF?
 
| R?/W?
 
| R?/W?
 
| Possibly a mirror of the I/O port map.
 
| Possibly a mirror of the I/O port map.
 
|-
 
|-
| $80700000-$807FFFFF
+
| $80700000 - $807FFFFF
 
| R
 
| R
 
| "EXTIO" boot ROM.
 
| "EXTIO" boot ROM.
 
|-
 
|-
| $A0000000-$A3FFFFFF
+
| $A0000000 - $A3FFFFFF
 
| R
 
| R
 
| [[HuC6261]] (VCE) Palette RAM Data Port Read, intended for use with bitstring instructions.
 
| [[HuC6261]] (VCE) Palette RAM Data Port Read, intended for use with bitstring instructions.
 
|-
 
|-
| $A4000000-$A7FFFFFF
+
| $A4000000 - $A7FFFFFF
 
| R
 
| R
 
| [[HuC6270]] (VDC-A) VRAM Data Port Read, intended for use with bitstring instructions.
 
| [[HuC6270]] (VDC-A) VRAM Data Port Read, intended for use with bitstring instructions.
 
|-
 
|-
| $A8000000-$ABFFFFFF
+
| $A8000000 - $ABFFFFFF
 
| R
 
| R
 
| [[HuC6270]] (VDC-B) VRAM Data Port Read, intended for use with bitstring instructions.
 
| [[HuC6270]] (VDC-B) VRAM Data Port Read, intended for use with bitstring instructions.
 
|-
 
|-
| $AC000000-$AFFFFFFF
+
| $AC000000 - $AFFFFFFF
 
| R
 
| R
 
| [[HuC6272]] (KING) KRAM Data Port Read, intended for use with bitstring instructions.
 
| [[HuC6272]] (KING) KRAM Data Port Read, intended for use with bitstring instructions.
 
|-
 
|-
| $B0000000-$B3FFFFFF
+
| $B0000000 - $B3FFFFFF
 
| W
 
| W
 
| [[HuC6261]] Palette RAM Data Port Write, intended for use with bitstring instructions.
 
| [[HuC6261]] Palette RAM Data Port Write, intended for use with bitstring instructions.
 
|-
 
|-
| $B4000000-$B7FFFFFF
+
| $B4000000 - $B7FFFFFF
 
| W
 
| W
 
| [[HuC6270]] (VDC-A) VRAM Data Port Write, intended for use with bitstring instructions.
 
| [[HuC6270]] (VDC-A) VRAM Data Port Write, intended for use with bitstring instructions.
 
|-
 
|-
| $B8000000-$BBFFFFFF
+
| $B8000000 - $BBFFFFFF
 
| W
 
| W
 
| [[HuC6270]] (VDC-B) VRAM Data Port Write, intended for use with bitstring instructions.
 
| [[HuC6270]] (VDC-B) VRAM Data Port Write, intended for use with bitstring instructions.
 
|-
 
|-
| $BC000000-$BFFFFFFF
+
| $BC000000 - $BFFFFFFF
 
| W
 
| W
 
| [[HuC6272]] (KING) KRAM Data Port Write, intended for use with bitstring instructions.
 
| [[HuC6272]] (KING) KRAM Data Port Write, intended for use with bitstring instructions.
 
|-
 
|-
| $E0000000-$E7FFFFFF
+
| $E0000000 - $E7FFFFFF
 
| R/W
 
| R/W
 
| 32KB Internal Backup RAM.  Not present on the [[PC-FXGA]].  It is apparently 8-bit RAM, so the upper byte on 16-bit writes is ignored, and the address into the RAM is calculated like: (Address >> 1) &amp; 0x7FFF
 
| 32KB Internal Backup RAM.  Not present on the [[PC-FXGA]].  It is apparently 8-bit RAM, so the upper byte on 16-bit writes is ignored, and the address into the RAM is calculated like: (Address >> 1) &amp; 0x7FFF
 
|-
 
|-
| $E8000000-$EFFFFFFF
+
| $E8000000 - $EFFFFFFF
 
| R/W
 
| R/W
 
| External Backup RAM
 
| External Backup RAM
 
|-
 
|-
| $FFF00000-$FFFFFFFF
+
| $FFF00000 - $FFFFFFFF
 
| R
 
| R
 
| 2MB [[PC-FX BIOS | BIOS]] ROM
 
| 2MB [[PC-FX BIOS | BIOS]] ROM
Line 71: Line 84:
 
== CPU I/O Port Map ==
 
== CPU I/O Port Map ==
  
{|
+
{| class="styled_table"
 
|-
 
|-
| Port range
+
! Port range !! R/W !! Description
| R/W
+
| Description
+
 
|-
 
|-
| $00000000-$000000FF
+
| $00000000 - $000000FF
 
| R/W
 
| R/W
 
| Keyport.
 
| Keyport.
 
|-
 
|-
| $00000100-$000001FF
+
| $00000100 - $000001FF
 
| W
 
| W
| [[HuC6230]]
+
| [[HuC6230]] (SoundBox)
 
|-
 
|-
| $00000200-$000002FF
+
| $00000200 - $000002FF
 
| W
 
| W
 
|  [[HuC6271]] (RAINBOW)
 
|  [[HuC6271]] (RAINBOW)
 
|-
 
|-
| $00000300-$000003FF
+
| $00000300 - $000003FF
 
| R/W
 
| R/W
 
| [[HuC6261]] (VCE)
 
| [[HuC6261]] (VCE)
 
|-
 
|-
| $00000400-$000004FF
+
| $00000400 - $000004FF
 
| R/W
 
| R/W
 
| [[HuC6270]] (VDC-A)
 
| [[HuC6270]] (VDC-A)
 
|-
 
|-
| $00000500-$000005FF
+
| $00000500 - $000005FF
 
| R/W
 
| R/W
 
| [[HuC6270]] (VDC-B)
 
| [[HuC6270]] (VDC-B)
 
|-
 
|-
| $00000600-$000006FF
+
| $00000600 - $000006FF
 
| R/W
 
| R/W
 
| [[HuC6272]] (KING)
 
| [[HuC6272]] (KING)
 
|-
 
|-
| $00000700-$0000071F
+
| $00000700 - $0000071F
 
| W
 
| W
 
| Expansion bus reset register(D0 = 1, reset?  level sensitive?)
 
| Expansion bus reset register(D0 = 1, reset?  level sensitive?)
 
|-
 
|-
| $00000C00-$00000C3F
+
| $00000C00 - $00000C3F
 
| R
 
| R
 
| [[HuC6270]] (VDC-A) "address keep register"
 
| [[HuC6270]] (VDC-A) "address keep register"
 
|-
 
|-
| $00000C40-$00000C7F
+
| $00000C40 - $00000C7F
 
| R
 
| R
 
| [[HuC6270]] (VDC-B) "address keep register"
 
| [[HuC6270]] (VDC-B) "address keep register"
 
|-
 
|-
| $00000C80-$00000CBF
+
| $00000C80 - $00000CBF
 
| R/W
 
| R/W
 
| Backup Memory Control
 
| Backup Memory Control
 
|-
 
|-
| $00000CC0-$00000CFF
+
| $00000CC0 - $00000CFF
 
| R
 
| R
 
| "Gatearray version register"
 
| "Gatearray version register"
 
|-
 
|-
| $00000E00-$00000EFF
+
| $00000E00 - $00000EFF
 
| R/W
 
| R/W
 
| [[PC-FX IRQs | IRQ]] Control
 
| [[PC-FX IRQs | IRQ]] Control
 
|-
 
|-
| $00000F00-$00000FFF
+
| $00000F00 - $00000FFF
 
| R/W
 
| R/W
 
| [[PC-FX Timer | Timer]] Control
 
| [[PC-FX Timer | Timer]] Control
 
|-
 
|-
| $80500000-$80510000
+
| $80500000 - $80510000
 
| R/W
 
| R/W
 
| [[HuC6273]] (3D)
 
| [[HuC6273]] (3D)

Latest revision as of 22:41, 24 January 2012


The RISC CPU used in the PC-FX clocked at 21.477MHz.

The V810 CPU memory bus in the PC-FX runs in 16-bit mode(versus 32-bit mode).

CPU Memory Map

Memory range R/W Description
$00000000 - $001FFFFF R/W 1MB Internal RAM
$80000000 - $80000FFF? R?/W? Possibly a mirror of the I/O port map.
$80700000 - $807FFFFF R "EXTIO" boot ROM.
$A0000000 - $A3FFFFFF R HuC6261 (VCE) Palette RAM Data Port Read, intended for use with bitstring instructions.
$A4000000 - $A7FFFFFF R HuC6270 (VDC-A) VRAM Data Port Read, intended for use with bitstring instructions.
$A8000000 - $ABFFFFFF R HuC6270 (VDC-B) VRAM Data Port Read, intended for use with bitstring instructions.
$AC000000 - $AFFFFFFF R HuC6272 (KING) KRAM Data Port Read, intended for use with bitstring instructions.
$B0000000 - $B3FFFFFF W HuC6261 Palette RAM Data Port Write, intended for use with bitstring instructions.
$B4000000 - $B7FFFFFF W HuC6270 (VDC-A) VRAM Data Port Write, intended for use with bitstring instructions.
$B8000000 - $BBFFFFFF W HuC6270 (VDC-B) VRAM Data Port Write, intended for use with bitstring instructions.
$BC000000 - $BFFFFFFF W HuC6272 (KING) KRAM Data Port Write, intended for use with bitstring instructions.
$E0000000 - $E7FFFFFF R/W 32KB Internal Backup RAM. Not present on the PC-FXGA. It is apparently 8-bit RAM, so the upper byte on 16-bit writes is ignored, and the address into the RAM is calculated like: (Address >> 1) & 0x7FFF
$E8000000 - $EFFFFFFF R/W External Backup RAM
$FFF00000 - $FFFFFFFF R 2MB BIOS ROM


CPU I/O Port Map

Port range R/W Description
$00000000 - $000000FF R/W Keyport.
$00000100 - $000001FF W HuC6230 (SoundBox)
$00000200 - $000002FF W HuC6271 (RAINBOW)
$00000300 - $000003FF R/W HuC6261 (VCE)
$00000400 - $000004FF R/W HuC6270 (VDC-A)
$00000500 - $000005FF R/W HuC6270 (VDC-B)
$00000600 - $000006FF R/W HuC6272 (KING)
$00000700 - $0000071F W Expansion bus reset register(D0 = 1, reset? level sensitive?)
$00000C00 - $00000C3F R HuC6270 (VDC-A) "address keep register"
$00000C40 - $00000C7F R HuC6270 (VDC-B) "address keep register"
$00000C80 - $00000CBF R/W Backup Memory Control
$00000CC0 - $00000CFF R "Gatearray version register"
$00000E00 - $00000EFF R/W IRQ Control
$00000F00 - $00000FFF R/W Timer Control
$80500000 - $80510000 R/W HuC6273 (3D)


Official Documentation

V810 Family Architecture